The drawback with this type of configuration is that for every tuning step the processor has to perform a complete program cycle, often involving long iterative computations and slow dialogue with the LCD processor. The time taken for these activities limits the number of frequency tuning steps that the system can execute over a given time period and if not compensated for in some way, would produce an unbearably slow tuning rate. A couple of techniques are used to overcome this. Firstly variable rate tuning is used whereby the frequency step size increases with the speed of rotation of the tuning control, secondly a rotary encoder of relatively few increments per revolution is used to allow a reasonable rotation rate with the variable step rate function.

I found the variable rate tuning off-putting and at times difficult to use, after attempting without success to improve upon the scheme I decided to try a new approach, without variable rate tuning, with the aim of producing a true "VFO feel" to the tuning.

Both PIC’s are clocked at 8.86MHz (my transceiver has a 10MHz IF and these crystals just happened to be available and were far enough away from the IF frequency so as to avoid interference).

The key to increasing the system tuning speed is that both processors run independently of each other allowing the tuning and display processes to run in parallel, until the LCD PIC calls for the current frequency. When this happens the DDS PIC passes the current binary frequency word over the serial interface and resumes scanning the controls and managing the DDS. Once it has received a new frequency update the LCD PIC processes it, formats it and feeds it the embedded LCD processor for display. An additional 10mS delay in the frequency request routine reduces the number of frequency calls to the DDS PIC further increasing the time available to the DDS PIC for the tuning process. The result is a nice "VFO like" tuning action with 10Hz steps and a 10kHz per revolution (double encoder size) tuning rate. Even though there is a delay between the displayed frequency and the actual DDS output the processes run fast enough so as not to be noticeable to the eye. The tuning action limits at about 2 rev’s per second. With further program and hardware optimisation this could be increased significantly. For example, the IF shift routine resides in the DDS PIC allowing USB/LSB switching, with my single crystal carrier oscillator and typically asymmetric ladder filter, by shifting the DDS output. With two carrier crystals and a symmetrical lattice filter this routine could reside in the LCD PIC freeing up processor time for the tuning routines.